- Open Access
Realization of large-scale sub-10 nm nanogratings using a repetitive wet-chemical oxidation and etching technique
© The Author(s) 2017
- Received: 7 December 2016
- Accepted: 19 March 2017
- Published: 24 March 2017
Despite many efforts to create nanogratings to exploit exceptionally enhanced nano-sized effects, realizing sub-10 nm nanogratings on a large area still remains a great challenge. Herein, we demonstrate fabrication of an inch-scale sub-10 nm nanogratings with simple and reliable features, by employing a repetitive wet-chemical oxidation and etching technique. We found that a few atomic layers of the silicon surface are naturally oxidized in a nitric acid (HNO3) solution, which enables the surface of the silicon to be etched with 1.0 nm resolution by selectively removing the oxide layers. By combining this high-precision etching technique with silicon nanogratings previously prepared by conventional methods, we successfully demonstrated a sub-10 nm silicon nanogratings on an inch-scale wafer.
- Sub-10 nm
- Self-limiting oxidation
- Wet-chemical digital etching
- Repetitive wet-chemical oxidation and etching
Nanogratings are a three-dimensional array of regularly spaced nanoscale line structures. They have received a great deal of attention because their anisotropic form factor is desirable for high performance electrical  and optical [2, 3] devices. The recent development of nanofabrication technologies has made it possible to fabricate nanowire-  and nanogap-arrays , utilizing the shape of nanogratings, so that nanogratings have becoming increasingly useful for various applications. In particular, many researchers have found that the properties of a material can be dramatically improved when the pattern size is reduced to tens of nanometers and below [6, 7]. There have been a considerable number of studies focused on fabricating small nanogratings on large areas to realize high performance devices.
To fabricate the nanograting substrate, researchers have suggested various methods based on conventional photolithography, including KrF , immersion , and spacer  lithography. Even though hundreds of nanometer scale grating patterns have been successfully fabricated, it is difficult to fabricate grating patterns with dimensions of tens of nanometers because of resolution limitations . Improved technologies, such as direct self-assembly [12, 13] and e-beam lithography , have been developed that can fabricate devices on the tens of nanometer scale. However, they still have fabrication difficulties including stability, and yield on large areas.
In a successful effort to produce tens of nanometer-scale nanogratings over a large area, we previously developed a pattern downscaling technology based on multiple spacer lithography and pattern-recovery techniques . As a result, highly compact and continuous 100 nm pitch silicon nanogratings were successfully fabricated on 8-inch wafer, and the method allowed us to fabricate various material-based nanowires easily with extremely high aspect ratio (4,000,000:1). However, this technique also has a resolution limitation, which prevents it from being used for superior nano-scale phenomena [6, 7]. Thus, it is still necessary to develop a method to fabricate a smaller dimension nanogratings on a large area with stable and simple features.
In this paper, we demonstrate a large-scale sub-10 nm silicon nanogratings. To realize the sub-10 nm grating, we developed a nitric acid (HNO3) based surface oxidation/etching technique, based on a conventional wet-chemical solution process. We determined that the moderate reactant used for silicon oxidation exists stably at the azeotropic point of HNO3 and the oxidation is self-limiting within a few nanometer range. As a result, ultra-accurate silicon etching (1.0 nm level) can be achieved by selectively removing the oxidized surface.
By combining our multiple spacer lithography/pattern recovery technique and the developed HNO3 based silicon etching techniques, we successfully fabricated sub-10 nm silicon nanogratings on an inch-scale level. The developed method is based on conventional photolithography and low temperature wet-chemical solutions with nanoscale controllability, which is highly useful for achieving various nanostructures such as nanodots, nanosquares, and nanoshells, and their applications.
The proposed method employed a nanoscale digital etching process, based on activating only the surface layer and then selectively removing the activated layer [16–18]. Previously, oxidant solutions such as hydrogen peroxide (H2O2) and mixture of H2O2 and acid solution have been typically used as the oxidant solutions in the wet-chemical digital etching technique. However, they are not suitable for the pattern reduction of large-scale substrates, because of their weak oxidizing power or non-uniform reactivity [19, 20].
The overall process is schematically shown in Fig. 1. The wet-chemical digital etching was carried out by repetitive HNO3 oxidation and oxide etching. First, the HNO3 solution at azeotropic point should be prepared for experiments. By heating any concentration of HNO3 solution, it can reach the azeotropic point with change of boiling point according to its concentration. When the boiling point of HNO3 solution is kept constant at 120 °C, it means that HNO3 solution reached the azeotropic point, so its concentration is kept constant at 68%. While continuously heating the HNO3 solution on hot plate to keep the solution at the azeotropic point, nanostructured substrate (100 nm pitch nanogratings) was immersed into the HNO3 solution for a sufficient time over 5 min until the oxide thickness is saturated. After the oxidation process was finished, the shallow oxide was then removed using diluted hydrofluoric acid (HF, 0.1 wt%) solution. It is necessary to completely rinse the substrate after each process in order to prevent contamination. By alternately immersing the prepared nanograting substrate into these two solutions, the width of the nanogratings was progressively thinned as the number of process cycles increased. The dimensions could be completely controlled, and were used to realize sub-10 nm structures.
As the oxidation time increased, the oxide thickness continued to increase until it reached the saturation point at about 5 min. After 5 min of oxidation, the oxide thickness saturated at around 1.8 nm and we confirmed that further oxidation up to 30 min did not increase the thickness. The saturated oxide thickness after 5 min of oxidation was also confirmed using HR-TEM imagery, and the results agreed with the value obtained from spectroscopic ellipsometry. Based on this identification, we set the oxidation time to over 5 min for each repeated oxidation cycle.
AFM measurement was carried out after repeating the size reduction cycles 5, 10, 15, 20 times respectively. As expected, the depth increased proportionally with the number of repeated cycles, and the extracted etching depth per cycle from linear fitting was 1.0 nm. Note that the smaller etching depth of silicon compared with the produced oxide thickness can be explained with the conventional model of silicon volume expansion during the oxidation process. As can be seen in Fig. 3a, about half of the oxide is formed under the silicon surface. This phenomenon is well-known and originated from the fact that oxide molecular density is about half of that of silicon. This is why the silicon etching depth is about half of the oxide thickness . Furthermore, when surface roughness was compared between the initial and etched surfaces, no noticeable change could be observed. This means the silicon surface was uniformly oxidized and etched with each repeated cycle.
We realized a sub-10 nm nanogratings on a large-scale wafer by employing a wet-chemical digital etching technique. The introduced HNO3 based wet-chemical digital etching technique can remove silicon at a resolution of 1.0 nm per cycle, because the HNO3 oxidizes only a few atomic layers of silicon surface per cycle. Saturation of the silicon oxide thickness means that this technique can be used to uniformly etch the surface of a large area. A previously prepared sub-40 nm nanogratings on inch-scale wafer was reduced to a precisely controlled sub-10 nm using this technique. Furthermore, the nanoscale size reduction technique developed in this work can be applied to any kind of silicon nanostructures, in addition to nanogratings. The sub-10 nm structures produced by this method have great potential for a variety of applications in high performance electronics, optoelectronics and sensing devices.
MSJ and KWC carried out design, fabrication, measurement and analysis of the results, and drafted the manuscript. SMH performed analysis of results and participated in editing the manuscript. All authors read and approved the final manuscript.
We also thanks to members of our laboratory (3D micro-nano structures lab.) for sincere comments on this research.
The authors declare that they have no competing interests.
Availability of data and materials
The datasets supporting the conclusions of this article are included within the article and its additional files.
This work was supported by a National Research Foundation of Korea (NRF) Grant funded by the Korean government (MEST) (No. 2011-0028781).
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